The outline of a typical structure of a conventional semiconductor memory device is that four memory cell arrays are formed near four corners of a rectangular shaped semiconductor chip and a Y address buffer for outputting address data is formed on a nearly central portion thereof. Each memory cell array is combined with a Y address decoder, which selects a memory cell in the memory cell array and reads data stored therein in accordance with the Y address data, and a data amplifier, which amplifies the data read by the Y address decoder and outputs it to an output circuit for supplying the amplified data to an external circuit. Since the output circuit is situated on a side end of the semiconductor chip, the length of a wiring between the output circuit and the memory cell array situated on the right side of the semiconductor chip is inevitably different from that between the output circuit and the memory cell array situated on the left side. Accordingly, there arises a difference in a delay time of the data between those started from the memory cell arrays situated on the right and left sides of the semiconductor chip. In other words, an access time to the memory cell array on the right side is different from that to the same on the left side, and it is extremely desirable to remove this disadvantage.